open_project yuv2rgb
set_top YuvToRgb
add_files yuv2rgb.cpp
add_files -tb "yuv2rgb_tb.cpp input.data check.data"
open_solution solution1
set_part xc7z010clg400-1
create_clock -period 10 -name default
csim_design
csynth_design
cosim_design
exit
